Rainbow Electronics MAX5098A User Manual

Page 15

MAX5098A

Dual, 2.2MHz, Automotive Buck or Boost

Converter with 80V Load-Dump Protection

______________________________________________________________________________________

Internal Oscillator/Out-of-Phase Operation

The internal oscillator generates the 180° out-of-phase
clock signal required by each regulator. The switching
frequency of each converter (f

) is programmable

from 200kHz to 2.2MHz using a single 1% resistor at
R

OSC

. See the

Setting the Switching Frequency

section.

With dual synchronized out-of-phase operation, the
MAX5098A’s internal MOSFETs turn on 180° out-of-
phase. The instantaneous input current peaks of both
regulators do not overlap, resulting in reduced RMS rip-
ple current and input-voltage ripple. This reduces the
required input capacitor ripple current rating, allows for
fewer or less expensive capacitors, and reduces
shielding requirements for EMI.

Synchronization (SYNC)/

Clock Output (CKO)

The main oscillator can be synchronized to the system
clock by applying an external clock (f

SYNC

) at SYNC.

The f

SYNC

frequency must be twice the required oper-

ating frequency of an individual converter. Use a TTL
logic signal for the external clock with at least 100ns
pulse width. R

OSC

is still required when using external

synchronization. Program the internal oscillator fre-
quency to have f

= 1/2 f

SYNC.

The device is properly

synchronized if the SYNC frequency, f

SYNC

, varies

within ±20%.

Two MAX5098As can be connected in the master-slave
configuration for four ripple-phase operation (Figure 1).
The MAX5098A provides a clock output (CKO) that is
45° phase-shifted with respect to the internal switch
turn-on edge. Feed the CKO of the master to the SYNC
input of the slave. The effective input ripple switching
frequency is four times the individual converter’s switch-
ing frequency. When driving the master converter using
an external clock at SYNC, set the f

SYNC

clock duty

cycle to 50% for effective 90° phase-shifted interleaved
operation. When a SYNC is applied (and FSEL_1 = 0),
converter 1 duty cycle is limited to 75% (max).

Input Voltage (V+)/

Internal Linear Regulator (V

)

All internal control circuitry operates from an internally
regulated nominal voltage of 5.2V (V

). At higher input

voltages (V+) of 5.2V to 19V, V

is regulated to 5.2V. At

5.2V or below, the internal linear regulator operates in
dropout mode, where V

follows V+. Depending on the

load on V

, the dropout voltage can be high enough to

reduce V

below the undervoltage lockout (UVLO)

threshold. Do not use V

to power external circuitry.

For input voltages less than 5.5V, connect V+ and V

together. The load on V

is proportional to the switching

frequency of converter 1 and converter 2. See the V

Output Voltage vs. Converter Switching Frequency
graph in the

Typical Operating Characteristics

. For

input voltage ranges higher than 5.5V, disconnect V

from V+.

Bypass V+ to SGND with a 1µF or greater ceramic
capacitor placed close to the MAX5098A. Bypass V

with a 4.7µF ceramic capacitor to SGND.

Undervoltage Lockout/

Soft-Start/Soft-Stop

The MAX5098A includes an undervoltage lockout with
hysteresis and a power-on-reset circuit for converter
turn-on and monotonic rise of the output voltage. The
falling UVLO threshold is internally set to 4.1V (typ) with
180mV hysteresis. Hysteresis at UVLO eliminates “chat-
tering” during startup. When V

drops below UVLO, the

internal MOSFET switches are turned off.

The MAX5098A digital soft-start reduces input inrush
currents and glitches at the input during turn-on. When
UVLO is cleared and EN_ is high, digital soft-start slow-
ly ramps up the internal reference voltage in 64 steps.
The total soft-start period is 4096 internal oscillator
switching cycles.

Driving EN_ low initiates digital soft-stop that slowly
ramps down the internal reference voltage in 64 steps.
The total soft-stop period is equal to the soft-start period.

To calculate the soft-start/soft-stop period, use the fol-
lowing equation:

where f

CKO

is the internal oscillator and f

CKO

is twice

each converters’ switching frequency (FSEL_1 = V

)

Enable (EN1, EN2)

The MAX5098A dual converter provides separate
enable inputs, EN1 and EN2, to individually control or
sequence the output voltages. These active-high enable
inputs are TTL compatible. Driving EN_ high initiates
soft-start of the converter, and PGOOD_ goes logic-high
when the converter output voltage reaches the
V

TPGOOD_

threshold. Driving EN_ low initiates a soft-

stop of the converter, and immediately forces PGOOD_
low. Use EN1, EN2, and PGOOD1 for sequencing (see
Figure 2). Connect PGOOD1 to EN2 to make sure con-
verter 1’s output is within regulation before converter 2
starts. Add an RC network from V

to EN1 and EN2 to

delay the individual converter. Sequencing reduces
input inrush current and possible chattering. Connect
EN_ to V

for always-on operation.

kHz

CKO

(

)

(

)

4096