Texas Instruments TMS320C645x DSP - Manual (Page 110)

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5.26 Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH)
EMAC Port Registers
The receive filter low priority frame threshold register (RXFILTERLOWTHRESH) is shown in Figure 54
and described in Table 54 .
Figure 54. Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH)
31 16
Reserved
R-0
15 8 7 0
Reserved RXFILTERTHRESH
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 54. Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH) Field
Descriptions
Bit Field Value Description
31-8 Reserved 0 Reserved
7-0 RXFILTERTHRESH Receive filter low threshold. These bits contain the free buffer count threshold value for filtering
low priority incoming frames. This field should remain zero, if no filtering is desired.
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 110 SPRU975B – August 2006
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