Renesas HD151TS207SS - Manual (Page 29)

HD151TS207SS
Rev.1.00, Apr.25.2003, page 29 of 38
DC Electrical Characteristics CPU/CPU# Clock
Ta = 0°C to 70°C, VDD = 3.3 V, Iref = 475
Ω
Item Symbol Min Typ * 1 Max Unit Test Conditions
Output voltage V
O
 
1.20 V Rp = 49.9
Ω
, VDD = 3.3 V
Output Current I
O

I(nom) *
2 
mA VDD = 3.3 V
Output resistance 3000
  Ω
V
O
= 1.2 V
Notes: 1. For conditions shown as Min or Max, use the appropriate value specified under recommended
operating conditionaI (nom) is output current(Ioh) shown in below.
2. Ioh = VDD/(3Rr) = 3.3/(3x475) = 2.32 mA,
Ioh x6 = 13.89 mA (Voh @Z: 0.695 V @50
Ω
),
Ioh x2 = 4.63 mA (Voh @Z: 0.232 V @50
Ω
)
AC Electrical Characteristics CPU/CPU# Clock (CPU at 0.7V Timing)
Ta = 0°C to 70°C, VDD = 3.3 V, C
L
= 2 pF, Rs = 33.2
Ω
, Rp = 49.9
Ω
Item Symbol Min Typ Max Unit Test Conditions Notes
Cycle to cycle jitter t
CCS

|125|

ps Note1
CPU Group Skew
(CPU clock out to
CPU clock out) t
skS

|100|

ps
Rise time t
r
175

700 ps V
O
= 0.175 V
to 0.525 V
200MHz
Fall time t
f
175

700 ps V
O
= 0.175 V
to 0.525 V
200MHz
Clock Duty Cycle 45 50 55 % 200MHz
CPU clock period(100)

9.99

ns
CPU clock period(133)

7.49

ns
CPU clock period(166)

5.99

ns
CPU clock period(200)

4.99

ns
Cross point(0.7V) voltage Vcross 0.25

0.55 V 200MHz
Note: 1. Difference of cycle time between two adjoining cycles.