Renesas SuperH SH7339 - Manual (Page 27)

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Figure 2.3 [Window trace] Page
Notes: 1. When the [L-bus] or [I(M)-bus] radio button is selected, the bus cycles listed below
will be traced. The [I-bus] and [M-bus] radio buttons are only available when the
[I(M)-bus] radio button has been selected.
•
L-bus: A bus cycle on the L-bus generated by the CPU is acquired. A bus cycle is
also acquired when the cache has been hit.
•
I-bus: A bus cycle on the I-bus generated by the CPU or DMA is acquired. A bus
cycle is not acquired when the cache has been hit.
•
M-bus: A bus cycle on the M-bus generated by the CPU is acquired. A bus cycle is
not acquired when the cache has been hit.
It is not possible to acquire trace information on accesses to I-bus and M-bus at the
same time.
The address information acquired by the I-bus/M-bus is 28 bits and the upper 4 bits are
displayed as ‘*’. The source cannot be displayed in the [Trace] window.