Nvidia NFORCE 780I SLI - Manual (Page 104)

780i 3-Way SLI Motherboard
NVIDIA Corporation
94 October 17, 2007 | DU-03597-001_v01
Table 7. NVMM POST Codes
NVMM POST Codes
Code Name Description
0F0h Identify HW in the system
0F1h Register the slam tables
0F2h Early SLAM table
0F3h COM port initialization
000h Initialize the hardware devices
001h Override input parameters, etc. before QUERY
004h Query the hardware devices
008h Read SPD & fill in arrays
00Ch ROM table pointer
010h Initialize the Memory Controller
011h Program the PLLs
012h Query after memory PLL has been set
013h Set Dynamic SPD values
014h Load MemInfoStruct
015h Load the DIMM geometry (using SPD)
016h Prepare MRS variables
017h Probe memory geometry
018h PROD_C: PROD f/ Calculated ref manuals
019h PROD_D: PROD w/ Discrete assembly
programming
01Ah PROD_E: PROD w/ Expandable criteria
01Bh Send MRS/EMRS configuration cycles
01Ch Overvoltage handling
01Dh PROD_F: PROD Final - after MRS/EMRS
020h PCI Express Initialization
030h Load Spread Spectrum tables
040h Set Top-Of-Memory registers