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Tablea.3 pci connector j1 (back), Pci connector j1 (back) – LSI U40HVD User Manual

Page 60

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A-6

Technical Specifications

Table A.3

PCI Connector J1 (Back)

Signal Name

Pin

Signal Name

Pin

Signal Name

Pin

TRST/

1

AD28

22

PAR

43

+12 V

2

AD26

23

AD15

44

TMS

3

GND

24

+3.3 V

45

TDI

4

AD24

25

AD13

46

+5 V

5

IDSEL

26

AD11

47

INTA/

6

+3.3 V

27

GND

48

INTC/

7

AD22

28

AD09

49

+5 V

8

AD20

29

KEYWAY

50

RESERVED

9

GND

30

KEYWAY

51

3 V/5 V

10

AD18

31

C_BE0/

52

RESERVED

11

AD16

32

+3.3 V

53

KEYWAY

12

+3.3 V

33

AD06

54

KEYWAY

13

FRAME/

34

AD04

55

RESERVED

14

GND

35

GND

56

RST/

15

TRDY/

36

AD02

57

3 V/5 V

16

GND

37

AD00

58

GNT/

17

STOP/

38

3 V/5 V

59

GND

18

+3.3 V

39

REQ64/

60

RESERVED

19

SDONE

40

+5 V

61

AD30

20

SBO/

41

+5 V

62

+3.3 V

21

GND

42

Note: Shaded signals are not connected.