Silicon Image SiliconDrive SSDS00-3650H-R - Manual (Page 37)

ATA R EGISTERS SSD-H XXX (I)-3650 D ATA S HEET
S ILICON S YSTEMS P ROPRIETARY
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D OCUMENT : 3650H-02DSR J UNE 17, 2008 P AGE 25
D EVICE C ONTROL R EGISTER
The Device Control register is used to control the interrupt request and issue
ATA software resets.
Table 27: Device Control Register
Operation D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Write - - - - 1 SRST nIEN 0
Bit(s) Description
7-4 Reserved bits.
3 Always set to 1.
2
Software Reset (SRST).
When set, resets the ATA software.
1
Interrupt Enable (nIEN).
When set, device interrupts are disabled.
There is no function in the memory-mapped mode.
0 Always set to 0.