Silicon Laboratories SI4421 - Manual (Page 7)

Si4421
7
Typical Application
Typical application with FIFO usage
C3 C2
10n
X1
10MHz
C1
2.2u
Si4421
1
3
4
2
5
7
6
8 9
10
11
12
13
14
15
16
VDD
SCK
SDO
nIRQ
P4
P3
P1
P2
SDI
CLKin
nSEL
nFFS
FFIT
nRES
PCB
Antenna
P5
P6
P7
nRESin
C4
2.2n
P0
CLK
(optional)*
TP
(optional)
(optional)*
(optional)
(opt.)
(optional)
VDI
Note: * Connections needed only in time critical applications
Recommended supply decoupling capacitor values
C2 and C3 should be 0603 size ceramic capacitors to achieve the best supply decoupling.
Band [MHz] C1 C2 C3
433 2.2µF 10nF 220pF
868 2.2µF 10nF 47pF
915 2.2µF 10nF 33pF
Property C1 C2 C3
SMD size A 0603 0603
Dielectric Tantalum Ceramic Ceramic
Pin Function vs. Operation Mode
Mode Bit setting Function Pin 6 Pin 7
el = 0 Internal TX data register disabled TX data input
Transmit
el = 1 Internal TX data register enabled
nFFS input
(TX data register can be accessed)
Not used
ef = 0 Receiver FIFO disabled RX data output
RX data clock
output
Receive
ef = 1 Receiver FIFO disabled
nFFS input
(RX data FIFO can be accessed)
FFIT output
The el and ef bits can be found in the Configuration Setting Command on page 15. Bit el enables the internal TX data register.
Bit ef enables the FIFO mode.