Intel PXA26X - Manual (Page 61)

Intel® PXA26x Processor Family Developer’s Manual 2-31
System Architecture
0x4110 0004 MMC_STAT MMC Status Register (read only)
0x4110 0008 MMC_CLKRT MMC clock rate
0x4110 000C MMC_SPI SPI mode control bits
0x4110 0010 MMC_CMDAT Command/response/data sequence control
0x4110 0014 MMC_RESTO Expected response time out
0x4110 0018 MMC_RDTO Expected data read time out
0x4110 001C MMC_BLKLEN Block length of data transaction
0x4110 0020 MMC_NOB Number of blocks, for block mode
0x4110 0024 MMC_PRTBUF Partial MMC_TXFIFO FIFO written
0x4110 0028 MMC_I_MASK Interrupt Mask
0x4110 002C MMC_I_REG Interrupt Register (read only)
0x4110 0030 MMC_CMD Index of current command
0x4110 0034 MMC_ARGH MSW part of the current command argument
0x4110 0038 MMC_ARGL LSW part of the current command argument
0x4110 003C MMC_RES Response FIFO (read only)
0x4110 0040 MMC_RXFIFO Receive FIFO (read only)
0x4110 0044 MMC_TXFIFO Transmit FIFO (write only)
Clocks
Manager
0x4130 0000
0x4130 0000 CCCR Core Clock Configuration Register
0x4130 0004 CKEN Clock Enable Register
0x4130 0008 OSCC Oscillator Configuration Register
Network SSP 0x4140 0000
0x4140 0000 NSSCR0 NSSP Control register 0
0x4140 0004 NSSCR1 NSSP Control register 1
0x4140 0008 NSSSR NSSP Status register
0x4140 000C NSSITR NSSP Interrupt Test register
0x4140 0010 NSSDR NSSP Data Write Register / Data Read register
0x4140 0028 NSSTO NSSP Time Out register
0x4140 002C NSSPSP NSSP Programmable Serial Protocol
Audio SSP 0x4150 0000
0x4150 0000 ASSCR0 ASSP Control register 0
0x4150 0004 ASSCR1 ASSP Control register 1
0x4150 0008 ASSSR ASSP Status register
0x4150 000C ASSITR ASSP Interrupt Test register
0x4150 0010 ASSDR ASSP Data Write Register / Data Read register
0x4150 0028 ASSTO ASSP Time Out register
0x4150 002C ASSPSP ASSP Programmable Serial Protocol
Hardware
UART
0x4160 0000
0x4160 0000 HWRBR Receive Buffer register (read only)
Table 2-8. Register Address Summary (Sheet 11 of 13)
Unit Address Register Symbol Register Description