14 modem-in control register (micr), Table 13-20. modem-in control register, 15 modem-out status register (mosr) – Intel PXA26X User Manual
Page 492: Table 13-21. modem-out status register, No more valid buffer data available for transmits, Table 13-21, “modem-out status, Register
13-30
Intel® PXA26x Processor Family Developer’s Manual
AC97 Controller Unit
13.8.3.14
Modem-In Control Register (MICR)
13.8.3.15
Modem-Out Status Register (MOSR)
Table 13-20. Modem-In Control Register
Physical Address
4050_0108
MICR Register
AC97
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reserved
FE
IE
R
eser
ved
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
31:4
—
Reserved
3
FEIE
FIFO ERROR INTERRUPT ENABLE (FEIE):
Controls whether a receive FIFO error causes an interrupt.
0 – No interrupt occurs even if bit 4 in the MISR is set
1 – An interrupt occurs if bit 4 in the MISR is set.
2:0
—
Reserved
Table 13-21. Modem-Out Status Register
Physical Address
4050_0110
MOSR Register
AC97
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reserved
FIFO
E
R
e
ser
ve
d
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
31:5
—
Reserved
4
FIFOE
FIFO ERROR (FIFOE):
0 – No transmit FIFO errors have occurred
1 – A transmit FIFO error occurred. This bit is set if a transmit FIFO underrun occurs. In
this case, the last valid sample is repetitively sent out and the pointers are not
incremented.This could happen due to:
1. No more valid buffer data available for transmits.
2. Buffer data available but DMA controller has excessive bandwidth requirements.
Bit is cleared by writing a 1 to this bit position.
3:0
—
Reserved