Intel GD82559ER - Manual (Page 75)

Datasheet 69
Networking Silicon — GD82559ER
9.3.2 Register 17: PHY Unit Special Control Bit Definitions
8 Polarity This bit indicates 10BASE-T polarity.
1 = Reverse polarity
0 = Normal polarity
-- RO
7:2 Reserved These bits are reserved and should be set to 0B. 000000 RO
1 Speed This bit indicates the Auto-Negotiation result.
1 = 100 Mbps
0 = 10 Mbps
-- RO
0 Duplex Mode This bit indicates the Auto-Negotiation result.
1 = Full Duplex
0 = Half Duplex
-- RO
Bit(s) Name Description Default R/W
15 Scrambler By-
pass 1 = By-pass Scrambler
0 = Normal operations
0 RW
14 By-pass 4B/5B 1 = 4 bit to 5 bit by-pass
0 = Normal operation
0 RW
13 Force Transmit H-
Pattern 1 = Force transmit H-pattern
0 = Normal operation
0 RW
12 Force 34 Transmit
Pattern 1 = Force 34 transmit pattern
0 = Normal operation
0 RW
11 Good Link 1 = 100BASE-TX link good
0 = Normal operation
0 RW
10 Reserved This bit is reserved and should be set to 0b. 0 RW
9 Transmit Carrier
Sense Disable 1 = Transmit Carrier Sense disabled
0 = Transmit Carrier Sense enabled
0 RW
8 Disable Dynamic
Power-Down 1 = Dynamic Power-Down disabled
0 = Dynamic Power-Down enabled (normal)
0 RW
7 Auto-Negotiation
Loopback 1 = Auto-Negotiation loopback
0 = Auto-Negotiation normal mode
0 RW
6 MDI Tri-State 1 = MDI Tri-state (transmit driver tri-states)
0 = Normal operation
0 RW
5 Filter By-pass 1 = By-pass filter
0 = Normal filter operation
0 RW
4 Auto Polarity
Disable 1 = Auto Polarity disabled
0 = Normal polarity operation
0 RW
3 Squelch Disable 1 = 10BASE-T squelch test disable
0 = Normal squelch operation
0 RW
2 Extended
Squelch 1 = 10BASE-T Extended Squelch control enabled
0 = 10BASE-T Extended Squelch control disabled
0 RW
1 Link Integrity
Disable 1 = Link disabled
0 = Normal Link Integrity operation
0 RW
Bit(s) Name Description Default R/W