Intel UPI-C42 - Manual (Page 23)

UPI-C42 UPI-L42
WAVEFORMS (Continued)
DMA
290414 – 27
PORT 2
290414 – 28
PORT TIMING DURING EXTERNAL ACCESS (EA)
290414 – 29
On the Rising Edge of SYNC and EA is Enabled Port Data is Valid and can be Strobed On the Trailing Edge of Sync
the Program Counter Contents are Available
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