6 indexed, 5-bit offset, Indexed, 5-bit offset, Assembler syntax – Motorola HC12 User Manual

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User’s Manual

MCUez HC12 Assembler

134

Assembler Syntax

MOTOROLA

Assembler Syntax

7.4.3.6 Indexed, 5-Bit Offset

This addressing mode adds a 5-bit signed offset to the base index register to
form the memory address, which is referenced in the instruction. The valid
range for a 5-bit signed offset is [–16...15]. The base index register may be X,
Y, SP, PC, or PCR.

For information about indexed PC and indexed PC relative addressing modes,
see

7.4.3.16 Indexed PC versus Indexed PC Relative Addressing Mode

This addressing mode may be used to access elements in an n-element table,
whose size is smaller than 16 bytes.

Example:

ORG $1000

CST_TBL: DC.B $5, $10, $18, $20, $28, $30

ORG $800

DATA_TBL: DS.B 10

main:

LDX #$CST_TBL

LDAA 3,X

LDY #DATA_TBL

STAA 8, Y

Accumulator A is loaded with the byte value stored in memory location $1003
($1000 +3).

Then the value of accumulator A is stored at address $808 ($800 +8).