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Advanced ecc population guidelines, Mirrored memory population guidelines, Lockstep memory population guidelines – HP PROLIANT 580554-001 User Manual

Page 26

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Hardware options installation 26

Do not mix Unbuffered and Registered PC3 DIMMs.

DIMM speeds are supported as indicated in the following table.

Rank

Speeds supported (MHz)

Single- or dual-rank

1333, 1066

Quad-rank 1066

Advanced ECC population guidelines

For Advanced ECC mode configurations, observe the following guidelines:

Observe the general DIMM slot population guidelines (on page 25).

DIMMs may be installed individually.

Multi-processor Advanced ECC population order

For Advanced ECC mode configurations with multiple processors, populate the DIMM slots for each

processor sequentially in alphabetical order (A through C).

Mirrored Memory population guidelines

For Mirrored Memory mode configurations, observe the following guidelines:

Observe the general DIMM slot population guidelines (on page 25).

Always install DIMMs in channels 1 and 2 for each installed processor.

Do not install DIMMs in channel 3 for any processor.

DIMMs installed on channel 1 and channel 2 of an installed processor must be identical.

In multi-processor configurations, each processor must have a valid Mirrored Memory configuration.

In multi-processor configurations, each processor may have a different valid Mirrored Memory
configuration.

Multi-processor Mirrored Memory population order

For Mirrored Memory mode configurations with multiple processors, populate DIMM slots A and B for
each processor. Do not populate slot C.
After installing the DIMMs, use RBSU to configure the system for mirrored memory support ("Configuring

mirrored memory" on page 39).

Lockstep Memory population guidelines

For Lockstep memory mode configurations, observe the following guidelines:

Observe the general DIMM slot population guidelines (on page 25).

Always install DIMMs in channels 1 and 2 for each installed processor.

Do not install DIMMs in channel 3 for any processor.

DIMM configuration on channel 1 and channel 2 of a processor must be identical.

In multi-processor configurations, each processor must have a valid Lockstep Memory configuration.