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Hitachi KP-FD140F User Manual

Page 23

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13

2. Fixed shutter mode (External trigger operating mode: Mode 0)

When external trigger signal is high active, after the trigger signal rise edge, the strobe signal start/end

can be set to determine the strobe time.

At the strobe signal falling edge, the internal VD signal is reset and the video data are transmitted.























3. One trigger mode (External trigger operating mode: Mode 1)

When external trigger signal is high active, after the trigger signal rise edge, the strobe signal start/end can be

set to determine the strobe time.

At the flash signal falling edge, the internal VD signal is reset and the video data are transmitted.



















[sec]

rate

frame

Self

1

T1

(*1)

=

Shutter time
(Integration time)

More than 10μs

Trigger input

(High active)

High
Low

Shutter time

Shutter time
(Integration time)

Data output

More than 10μs

More than T1

(*1)

T2

(*7)

Strobe output

(High active)

Trigger delay

(*3)

Strobe delay

(*4)

Strobe duration1

(*5)

Strobe duration2

(*6)

VD output

(Low active)

Output delay

(*2)

Port1/Port2

output

(High active)

Port1/Port2 (Trigger) input signal width

(*2) 0.18~3930.42μs

0.96μs/step

(*3) 0.22~3930.46μs

0.96μs/step

(*4) 0.27~3930.51μs

0.96μs/step

(*5) 0.96~3931.2μs

0.96μs/step

(*6) Shutter Time – Strobe delay

(when duration time is set to 000h)

9H

(*7) T2 = 27μs (KP-FD140F/F140F)

(*7)

19μs (KP-FD32F/F32F)

(*7)

29μs (KP-F83F)

[sec]

rate

frame

Self

1

T1

(*1)

=

(*2) 0.18~3930.42μs

0.96μs/step

(*3) 0.22~3930.46μs

0.96μs/step

(*4) 0.27~3930.51μs

0.96μs/step

(*5) 0.96~3931.2μs

0.96μs/step

(*6) Shutter Time – Strobe delay

(when duration time is set to 000h)

Trigger input
(High active)

High
Low

Shutter time

Shutter time
(Camera setting value)

Data output

Shutter time
(Camera setting
value)

More than 10μs

More than 10μs

More than T1

(*1)

Strobe output

(High active)

Trigger delay

(*3)

Strobe delay

(*4)

Strobe duration1

(*5)

Strobe duration2

(*6)

Output delay

(*2)

Port1/Port2

output

(High active)

VD output

(Low active)

Port1/Port2(Trigger) input signal width

9H

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