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Ecc control, System voltages, Cpu core – EVGA nForce 123-YW-E175 User Manual

Page 45: Cpu fsb

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EVGA

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Command Per Clock: This is the command timing setting on a per clock unit basis (options

are 1T and 2T).

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tRRD: RAS#-to-RAS# delay of different banks (options are 1 through 15).

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tRC: RAS#-to-RAS# or auto refresh time of the same bank (options are 1 through 31).

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tWR: The Write recovery time (options are 2 through 7).

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tWTR: This is the minimum write-to-read delay with the same chip selected (options are 1

through 10).

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tREF: This is the DRAM refresh rate (options are Auto, 7.8uS, and 3.9uS).

ECC Control

Disabled

System Voltages

Select System Voltages from the Frequency/Voltage Control menu and press Enter to display
the System Voltages menu.

Phoenix – AwardBIOS CMOS Setup Utility

System Voltages

:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help

F5: Previous Values F7:Defaults

Main Level

Voltage level for CPU
Core (CPU VID)

Item Help

Parameters

Settings Current Value

CPU Core

[Auto]

1.28

CPU FSB

[Auto]

1.20V

Memory

[Auto]

1.900V

nForce SPP

[Auto]

1.30V

NF200 Voltage Level

[Auto]

1.20V

GTLVREF Lane 0

[Auto]

+00mv

GTLVREF Lane 1

[Auto]

+00mv

GTLVREF Lane 2

[Auto]

+00mv

GTLVREF Lane 3

[Auto]

+00mv

Users should exercise caution when over-voltaging,

,as it can cause system instability or even void

warranties and damage components.

CPU Core

Use the Page Up and Page Down keys to scroll through the voltages or select [Auto] to
automatically set the voltage level for the CPU Core.

CPU FSB

Use the Page Up and Page Down keys to scroll through the voltages or select [Auto] to
automatically set the voltage level for the CPU FSB.

Memory

This function defines the voltage level for the DRAM. Use the Page Up and Page Down keys to
select a voltage or select [Auto] to automatically set the voltage.

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