beautypg.com

Rrc r, Rst f,i, Rotate r-register right with carry – Epson S1C6200 User Manual

Page 81: Reset flags using immediate data i

background image

Source Format:

Operation:

OP-Code:

Type:

Clock Cycles:

Flag:

Description:

Example:

Source Format:

Operation:

OP-Code:

Type:

Clock Cycles:

Flag:

Description:

Example:

MSB

LSB

MSB

LSB

C

Z

D

I

C

Z

D

I

S1C6200/6200A CORE CPU MANUAL

EPSON

75

3 INSTRUCTION SET

RRC r

Rotate r-register right with carry

RRC r

d

3

C, d

2

d

3

, d

1

d

2

, d

0

d

1

, C

d

0

1

1

1

0

1

0

0

0

1

1 r

1

r

0

E8CH to E8FH

V

5

Set when the low-order bit of the r-register is 1; otherwise, reset.
Not affected
Not affected
Not affected

Shifts the contents of the r-register one bit to the right. The low-order bit is shifted
into the carry flag and the carry bit becomes the high-order bit of the r-register.

RRC MY

Memory (MY)

1010

1101

C flag

1

0

RST F,i

Reset flags using immediate data i

RST F,i

F

F

i

3

to i

0

1

1

1

1

0

1

0

1

i

3

i

2

i

1

i

0

F50H to F5FH

IV

7

Reset if i

0

is zero; otherwise, not affected.

Reset if i

1

is zero; otherwise, not affected.

Reset if i

2

is zero; otherwise, not affected.

Reset if i

3

is zero; otherwise, not affected.

Performs a logical AND operation between immediate data i and the contents of
the flags. The result is stored in each respective flag.

RST F,2

Flags (I,D,Z,C)

1010

0010

Source Format:

Operation:

OP-Code:

Type:

Clock Cycles:

Flag:

Description:

Example:

d

3

d

2

d

1

d

0

r-register

C

C

d

3

d

2

d

1

r-register

C

C

d

0

This manual is related to the following products: