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Epson S1C6200 User Manual

Page 31

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S1C6200/6200A CORE CPU MANUAL

EPSON

25

3 INSTRUCTION SET

B

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

A

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

9

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

8

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

7

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

6

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

5

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

4

1

0

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

0

0

0

1

1

1

1

1

1

3

n3

n3

n3

0

0

0

0

0

1

1

1

1

0

0

0

0

0

1

1

1

1

1

1

0

0

1

0

0

1

1

1

1

2

n2

n2

n2

0

1

1

1

1

0

0

0

0

0

1

1

1

1

0

0

0

0

1

1

0

1

0

0

1

0

0

0

1

1

n1

n1

n1

r1

0

0

1

1

0

0

1

1

r1

0

0

1

1

0

0

1

1

1

1

r1

r1

0

r1

r1

0

0

1

1

0

n0

n0

n0

r0

0

1

0

1

0

1

0

1

r0

0

1

0

1

0

1

0

1

0

1

r0

r0

0

r0

r0

0

1

1

1

Mn, B

A, Mn

B, Mn

r

XP

XH

XL

YP

YH

YL

F

SP

r

XP

XH

XL

YP

YH

YL

F

SP

SPH, r

r, SPH

SPL, r

r, SPL

LD

LD

LD

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

DEC

POP

POP

POP

POP

POP

POP

POP

POP

INC

RETS

RET

LD

LD

JPBA

LD

LD

HALT

SLP

NOP5

NOP7

I D Z C

↑ ↑

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

12

7

5

5

5

5

5

5

5

5

7

M(n3~n0)

B

A

M(n3~n0)

B

M(n3~n0)

SP

SP-1, M(SP)

r

SP

SP-1, M(SP)

XP

SP

SP-1, M(SP)

XH

SP

SP-1, M(SP)

XL

SP

SP-1, M(SP)

YP

SP

SP-1, M(SP)

YH

SP

SP-1, M(SP)

YL

SP

SP-1, M(SP)

F

SP

SP-1

r

M(SP), SP

SP+1

XP

M(SP), SP

SP+1

XH

M(SP), SP

SP+1

XL

M(SP), SP

SP+1

YP

M(SP), SP

SP+1

YH

M(SP), SP

SP+1

YL

M(SP), SP

SP+1

F

M(SP), SP

SP+1

SP

SP+1

PCSL

M(SP), PCSH

M(SP+1), PCP

M(SP+2)

SP

SP+3, PC

PC+1

PCSL

M(SP), PCSH

M(SP+1), PCP

M(SP+2)

SP

SP+3

SPH

r

r

SPH

PCB

NBP, PCP

NPP, PCSH

B, PCSL

A

SPL

r

r

SPL

Halt (stop clock)

SLEEP (stop oscillation)

No operation (5 clock cycles)

No operation (7 clock cycles)

F90 to F9F

FA0 to FAF

FB0 to FBF

FC0 to FC3

FC4

FC5

FC6

FC7

FC8

FC9

FCA

FCB

FD0 to FD3

FD4

FD5

FD6

FD7

FD8

FD9

FDA

FDB

FDE

FDF

FE0 to FE3

FE4 to FE7

FE8

FF0 to FF3

FF4 to FF7

FF8

FF9

FFB

FFF

Operand

Clock

Operation Code

Flag

Mne-

monic

Operation

Operation

Code (HEX)

↑↓

↑↓

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