Differential input, analog gain and a/d converters, Digital reference input, Routing and control fpga – Grass Valley 8920ADT User Manual
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8920ADT Instruction Manual
8920ADT Analog Audio to AES/EBU Converter with Delay Tracking
Differential Input, Analog Gain and A/D Converters
The analog input is applied to a differential amplifier stage. This converts
the signal to single-ended and applies it to the coarse gain stage. Coarse
gain control pre-conditions the incoming signal before it is applied to the
A/D converters.
The fine gain control is by two center-off toggle switches on the front of the
module. They provide a 2 dB range of fine gain adjustment in approxi-
mately 0.1 dB increments. The control takes approximately 6 to 10 seconds
to transition from minimum to maximum.
The signal is converted back to a differential signal and applied to the 24-
bit A/D converter, then to the Routing and Control FPGA (Field Program-
mable Gate Array).
Digital Reference Input
The digital reference is applied via the loop-through input to the AES
receiver and phase-locked loop. This provides clock and data to the Control
and Routing FPGA and the A/D converters.
Routing and Control FPGA
The signals from the A/D converters are applied to the Routing and
Control FPGA. The incoming signal processing and level is determined by
the setting of one of 16 possible mode commands from a four-bit rotary
encoder switch and four signals from the level toggle switches. After pro-
cessing and delaying, the signals are embedded into an AES stream and
applied to the Output Drivers.
The Routing and Control section also drives the front panel LEDs and inter-
faces to the Controller section.
Controller
The Controller interfaces with the Routing and Control FPGA, the
EEPROM and the 8900 Frame Bus. The Controller also provides the FPGA
code that is downloaded to the FPGA during boot-up.
The Controller section handles local control and monitoring, as well as
remote control and monitoring via the frame bus (when an 8900NET
module is installed in the frame). Module settings are stored in the
EEPROM for power up recall.