Sundance SMT401 - Manual (Page 16)

Released Page 16 of 21 SMT401 PMC TIM Carrier User Guide
Document Name: SMT401 User Guide V1.2.doc Issue : 02 Rev.: 1.11
*add = pciAddress;
*control = BURST_ON;
for( i=0; i<96; i++ )
*fifo = data[i];
*control = BURST_OFF;
for( i=96; i<100; i++ )
*fifo = data[i];
The above code is not designed for speed but will cause burst action on the
PCI bus. DMA could replace the fifo loading to improve performance. The
PCI bridge will synchronise the burst enable bit in the control register to the
PCI burst cycle to maintain burst mode for each fifo payload of 16 words. The
address counter will not accept a new value whilst a PCI burst is in progress
or if either fifo is not empty.
Reading data from the PCI bus is the reverse of the above process. It should
be noted that with burst mode enabled, a read from the empty fifo will always
load 16 words from the PCI source.
4.3.2 PCI Address
The PCI address register is a 30 bit counter loaded from bits D31:2 of the
C40 data bus. The counter output is a 32 bit address with bits 1:0 always at
logic 0.
The PCI Address register must be written with a valid PCI address prior to
writing or reading from the FIFO. The value written into the address register
loses the bottom two bits in order to match the PCI bus mode used by the
bridge. The address counter increments on every valid PCI to track the
source or destination pointer in the event of a target disconnect. The bridge
may disconnect during burst transfers but this will be transparent to the C40.
4.3.3 C40 Control Register
The Control register provides the C40 interface with control over the
generation of interrupts on the PCI bus. Writing a 1 to the PCI INT bit will
generate an interrupt on the PCI bus via the INTA line. The interrupt is
cleared / acknowledged through the target interrupt control register.
Bit(s) 31-24 23:16 15:2 1 0
Name 0 0 0 PCI INT BURST
Product Name: SMT401 Revision Date: 07 December 2004
Author: Mark I. Cartlidge (Updated by SM, added JTAG slave section) Original Date: 12 May 1999