Reset_in (jp3 pins 3 & 4), Busreset (jp3 pins 5 & 6), Mode (jp3 pins 1 & 2) – Sundance SMT401 User Manual
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SMT401 PMC TIM Carrier User Guide
Document Name:
SMT401 User Guide V1.2.doc
Issue : 02
Rev.: 1.11
3.3.2
#RESET_IN (JP3 pins 3 & 4)
The #RESET_IN signal is used to reset the SMT401 TIM site when there is a
network of C4x processors upstream of the SMT401. Pin 3 can be used as a
ground signal for #RESET_IN.
For details on how to control #RESET_IN when the SMT401 is not used in
the Parallel C/AXP environment, refer to the document "SMT401
Programming Information" described in chapter 4.
3.3.3
#BUSRESET (JP3 pins 5 & 6)
The #BUSRESET signal is used to reset a network of C4x processors
downstream of the SMT401. Pin 5 can be used as a ground signal for
#BUSRESET.
For details on how to control #BUSRESET when the SMT401 is not used in
the Parallel C/AXP environment, refer to the document "SMT401
Programming Information" described in chapter 4.
3.3.4
MODE (JP3 pins 1 & 2)
When using the SMT401 under Parallel C/AXP, to configure the SMT401 as
an attached processor, connect pins 7 and 8 together with a shorting link. If
pins 7 and 8 are unconnected, the SMT401 acts as a link engine.
When not using Parallel C/AXP, a read-only flag, MODE, in the SMT401
Status register reflects whether or not pins 7 and 8 are connected together.
Refer to the document "SMT401 Programming Information" described in
chapter 4 for further information.
Product Name:
SMT401
Revision Date:
07 December 2004
Author:
Mark I. Cartlidge (Updated by SM, added JTAG slave section)
Original Date:
12 May 1999