Sundance SMT166 - Manual (Page 8)

4 Functional Description
4.1 Block Diagram
Below is shown the block diagram of the SMT166 board:
SMT166 – SLB Carrier Board
SLB Bus
Rocket IOs
Parallel Bus
An SLB cable can be used to link the SLB on the Master module to the SLB on the SMT166 while using RSLs.
PCIe cable connectors can be used as a link to a host PC. 4 and 1-lane cables are available as well as Host Interface Board to communicate to a
PC.
FPGA_0
Virtex 6
LX130T-LX365T
SX315T-SX475T
PSU
Section
DDR3
Memory
Bank 2
SLB
Mezzanine 0
SLB
SLB
Mezzanine 1
SLB
SLB
Mezzanine 2
SLB
SLB
Mezzanine 3
SLB
FPGA_1
Virtex 6
LX130T-LX365T
SX315T-SX475T
DDR3
Memory
Bank 3
DDR3
Memory
Bank 0
DDR3
Memory
Bank 1
Full
SLB
i
Full SLB
j
Full
SLB
l
Full SLB
k
RSL x2
m
RSL x2
n
Half SLB
n
Half SLB m
RSL x4
o
i Channels x2
PCIe
Cable
x4
x4
l
Master
Module
SLB Connector
R
S
L R
S
L PCIe
Cable
x4
x4
j
PCIe
Cable
x1
x1
i
PCIe
Cable
x1
x1
k
USB+CPLD
+Flash
To configure
Virtex6
FPGAs and
access
Master
Module Flash
Clock
Synthesiser
Synchroniser
Top TIM Connector
Bottom TIM Connector
Dual
SATA3.0
x2
q
Dual
SATA3.0
x2
p
1Gigabit
Ethernet 1Gigabit
Ethernet
Figure 1 - SMT166 Block Diagram.
Product Specification SMT166 Page 8 of 44 Last Edited: 17/06/2014 16:12:00