Sundance SMT166 User Manual
Page 3
Table of Contents
1
Introduction .................................................................................................................... 5
2
Related Documents ........................................................................................................ 6
3
System Photograph ........................................................................................................ 7
4
Functional Description .................................................................................................. 8
4.1
Block Diagram ................................................................................................................ 8
4.2
Module Description ..................................................................................................... 10
4.2.1
Connectors available on the board ..................................................................... 10
4.2.1.1
SLB connectors and cables .......................................................................... 10
4.2.1.2
TIM Site ............................................................................................................ 12
4.2.1.3
External clocks ............................................................................................... 13
4.2.1.4
PCI Express ..................................................................................................... 13
4.2.1.5
SATA 3.0 .......................................................................................................... 14
4.2.1.6
Ethernet ........................................................................................................... 14
4.2.1.7
RS232 headers ............................................................................................... 14
4.2.1.8
Power supply .................................................................................................. 15
4.2.2
FPGAs ........................................................................................................................ 16
4.2.2.1
FPGA Power supplies .................................................................................... 16
4.2.2.2
FPGA Clock structure ................................................................................... 17
4.2.2.3
FPGA Configuration ...................................................................................... 17
4.2.3
DIP Switch Settings / FPGA Configuration ....................................................... 19
4.2.4
DDR3 Memory ......................................................................................................... 21
4.2.5
On-board reset ........................................................................................................ 22
4.2.6
Clock circuitry (optional) ...................................................................................... 22
4.2.7
General purpose IOs .............................................................................................. 23
4.2.8
RS232 ......................................................................................................................... 23
4.2.9
USB ............................................................................................................................. 23
4.2.10Ethernet..................................................................................................................... 23
4.2.11SATA3.0 .................................................................................................................... 24
4.2.12RSLs to Master module .......................................................................................... 24
4.2.13Inter-FPGA RSL links .............................................................................................. 24
4.2.14Inter-FPGA channels ............................................................................................... 24
4.2.15LEDs ........................................................................................................................... 25
4.3
Cooling of the board ................................................................................................... 26
4.4
Data Flow Block Diagram ........................................................................................... 27
4.5
SLB IO voltages ............................................................................................................. 28
5
Verification, Review and Validation Procedures ..................................................... 29
6
Safety .............................................................................................................................. 29
7
EMC ................................................................................................................................. 29
8
Timing Diagrams .......................................................................................................... 29
9
Circuit Description / Diagrams.................................................................................. 30
9.1
Clock circuitry: ............................................................................................................. 30
Product Specification SMT166
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Last Edited: 17/06/2014 16:12:00