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Measurement Computing CIO-DAC04/12 User Manual

Page 10

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8.

Toggle START bit to start pacer.

1024 samples or more:

1.

Stop pacer by setting 8254 to mode 2.

2.

Clear FIFO.

3.

Disable and reset interrupts.

4.

Set channel limits.

5.

Set START bit to hold off pacer.

6.

Initialize the 8254.

7.

Load FIFO with first 1024 samples.

8.

Install Interrupt Service Routine (ISR).

9.

Enable interrupts and clear START bit. The DACs will begin updating immediately.

Upon the FIFO becoming half-empty, the board will assert an INT. The ISR is responsible for filling the FIFO with 256 samples on
each interrupt. Upon filling the FIFO with the last of the data, the ISR should disable the interrupts and be un-installed.

CIO-DAC04/12-HS REGISTER MAP

Base + 0 (DAC LSB)

RD

-------------------- RESETS INTERRUPT -------------------------------

WR

D3

D2

D1

D0

N/A

N/A

N/A

N/A

Base + 1 (DAC MSB)

RD

------------------- RESETS FIFO ------------------------------------------

WR

D11

D10

D9

D8

D7

D6

D5

D4

Base + 2 (Channel select)

RD

N/A

N/A

H1

H0

N/A

N/A

L1

L0

WR

N/A

N/A

H1

H0

N/A

N/A

L1

L0

This address sets the active D/A channels. The channels selected must be consecutive. This register sets a start channel and a stop
channel. Channels in-between are automatically written to. You cannot jump channels between your start and stop channels. (i.e., if
you start at ch 1 and stop at ch 3, you will also write data to ch 2) The table below describes the start/stop channel selections.

High or Stop Channel

Low or Start Channel

CH

H1

H0

CH

L1

L0

0

0

0

0

0

0

1

0

1

1

0

1

2

1

0

2

1

0

3

1

1

3

1

1

The stop channel must always be greater than or equal to the start channel. For single channel operation, Start Ch. = Stop Ch.

Base + 3 (Control / Status)

RD

INTE

INT2

INT1

INT0

FFE

FFHF

FFERR INTST

WR

INTE

INT2

INT1

INT0

N/A

N/A

SIMUL START

Control Register Description (Write Base + 3):

Bit #

Name

Description

0

START

Used when total count is less than 1024. Setting the START bit starts DAC output
process. Since count is less than 1024, no interrupts are required.

= 0

Pacer starts when sample #1024 is written.

= 1

Transfers one sample if 8254 not programmed (Direct mode).

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