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4 register architecture – Measurement Computing CIO-DAC16-I User Manual

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4 REGISTER ARCHITECTURE

The CIO-DAC##-I is a simple board to understand. All control and data is
read/written with simple I/O read and write commands. No interrupt or DMA
control software is required. Thus, the board's outputs are easy to control directly
from BASIC, C or PASCAL.

The CIO-DAC##-I has two control and analog output registers.

The first address, or BASE ADDRESS, is determined by the setting of a bank of
switches on the board.

The register descriptions all follow the format:

A0

A1

A2

A3

A4

A5

A6

A7

0

1

2

3

4

5

6

7

the numbers along the top row are the bit positions within the 8-bit byte and the
numbers and symbols in the bottom row are the functions associated with each bit.

To write to or read from a register in decimal or HEX, the following weights apply:

Table 4-1. Register Bit Weights

80

128

7

40

64

6

20

32

5

10

16

4

8

8

3

4

4

2

2

2

1

1

1

0

HEX VALUE

DECIMAL VALUE

BIT POSITION

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