Foxconn 761GXK8MC-RS User Manual
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Chapter 3 BIOS Description
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Row to Row delay
When DRAM is refreshed, both rows and columns are addressed separately.
This setup item allows you to determine the timing of the transition from RAS
(row address strobe) to CAS (column addres strobe). The less the clock
cycles, the faster the DRAM performance.
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Row cycle time
This item is used to set Row cycle time.
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Row refresh cyc time
This item is used to set Row refresh cyc time.
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User config mode
This item is used to set User config mode.
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1T/2T Memory Timing
This setting controls the SDRAM command rate. Selecting[Auto] allows
SDRAM signal controller to run at 1T( T= clock cycles) rate. selecting[1T]
makes SDRAM signal controler run at 2T rate. 1T is faster than 2T.
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Read Preamble Value
This item is used to set Read preamble value
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Async Latency valu
This item is used to set Async Latency valu.
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MTRR mapping mode
This item is used to set MTRR mapping mode.
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