Foxconn NF4K8AB-8EKRS - Manual (Page 43)

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Chapter 3 BIOS Description
NF4K8AB Series User Manual
Max Memclock (MHz) (Default: Auto)
User can place an artificial memory clock limit on the system. Memory is pre-
vented from running faster than this frequency.
1T/2T Memory Timing (Default: Auto)
This setting controls the SDRAM command rate. Selecting [Auto] allows SDRAM
signal controller to run at 1T (T=clock cycles) rate. Selecting [1T] makes SDRAM
signal controller run at 2T rate. 1T is faster than 2T.
CAS# Latency (Tcl) (Default: Auto)
This option controls the CAS latency, which determines the timing delay (in
clock cycles) before SDRAM starts a read command after receiving it.
RAS# to CAS# delay (Trcd) (Default: Auto)
When DRAM is refreshed, both rows and columns are addressed separately.
This setup item allows you to determine the timing of the transition from RAS
(row address strobe) to CAS (column address strobe). The less the clock cycles,
the faster the DRAM performance.
Min RAS# active time (Tras) (Default: Auto)
This setting determines the time RAS takes to read from and write to a memory
cell.
Row Precharge Time (Trp) (Default: Auto)
This item controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If insufficient time is allowed for the RAS to accumulate
its charge before DRAM refresh, refreshing may be incomplete and DRAM may
fail to retain data. This item applies only when synchronous DRAM is installed
in the system.