BECKHOFF CB4051 - Manual (Page 43)

Advanced Chipset Features Chapter: BIOS Settings
Beckhoff New Automation Technology CB4051 page 43
5.5 Advanced Chipset Features
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable [By SPD]
Item Help
x CAS Latency Time Auto
x DRAM RAS# to CAS# Delay Auto
x DRAM RAS# Precharge Auto
x Precharge delay (tRAS) Auto
x System Memory Frequency Auto
SLP_S4# Assertion Widtch [4 to 5 Sec.]
System BIOS Cacheable [Enabled]
Video BIOS Cacheable [Disabled]
Memory Hole At 15M-16M [Disabled]
► PCI Express Root Port Func [Press Enter]
** VGA Setting **
PEG/Onchip VGA Control [Auto]
On-Chip Frame Buffer Size [ 8MB]
DVMT Mode [DVMT]
DVMT/FIXED Memory Size [ 128MB]
Boot Display [Auto]
Panel Scaling [Auto]
Panel Number [ 640x480]
↑↓→←:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
ü DRAM Timing Selectable
Options: By SPD / Manual
ü CAS Latency Time
Options: 5 / 4 / 3 / 6 / Auto
ü DRAM RAS# to CAS# Delay
Options: 2 / 3 / 4 / 5 / 6 / Auto
ü DRAM RAS# Precharge
Options: 2 / 3 / 4 / 5 / 6 / Auto
ü Precharge delay (tRAS)
Options: Auto / 4 / 5 / 6 / 7 / 8 / 10 / 11 / 12 / 13 / 14 / 15
ü System Memory Frequency
Options: Auto / 533MHz / 667MHz
ü SLP_S4# Assertion Width
Options: 4 to 5 Sec. / 3 to 4 Sec. / 2 to 3 Sec. / 1 to 2 Sec.
ü System BIOS Cacheable
Options: Enabled / Disabled
ü Video BIOS Cacheable
Options: Enabled / Disabled
ü Memory Hole At 15M-16M
Options: Enabled / Disabled
ü PCI Express Root Port Func
Sub menu: see "PCI Express Root Port Function" (p. 45)
ü PEG/Onchip VGA Control
Options: Onchip VGA / PEG Port / Auto