Artesyn MVME55006E Single Board Computer Installation and Use (July 2014) - Manual (Page 77)

MOTLoad Firmware
MVME55006E Single Board Computer Installation and Use (6806800A37J) 77
 PCI Slave Image 2 Bound Address Register = B1000000
Sets LSI2_BD to indicate that the upper bound of PCI memory addresses to be transferred
by this image is 0xB1000000.
 PCI Slave Image 2 Translation Offset = 400000000
Sets LSI2_TO to indicate that the PCI memory address is to be translated by 0x40000000
before presentation on the VMEbus; the result of the translation is: 0xB0000000 +
0x40000000 = 0xF0000000, thus 0xF0000000 on the VMEbus.
 PCI Slave Image 3 Control = C0400000
Sets LSI3_CTL to indicate that this image is enabled, write posting is enabled, VMEbus data
width is 16 bits, VMEbus address space is A16, data and non-supervisory AM encoding, no
BLT transfers to the VMEbus, and to accept addresses in PCI memory space.
 PCI Slave Image 3 Base Address Register = B3FF0000
Sets LSI3_BS to indicate that the lower bound of PCI memory addresses to be transferred
to the VMEbus by this image is 0xB3FF0000.
 PCI Slave Image 3 Bound Address Register = B4000000
Sets LSI3_BD to indicate that the upper bound of PCI memory addresses to be transferred
by this image is 0xB4000000.
 PCI Slave Image 3 Translation Offset = 4C000000
Sets LSI3_TO to indicate that the PCI memory address is to be translated by 0x4C000000
before presentation on the VMEbus; the result of the translation is: 0xB3FF0000 +
0x4C000000 = 0xFFFF0000, thus 0xFFFF0000 on the VMEbus.
 PCI Slave Image 4 -7
These images are set to zeroes and thus disabled.
 VMEbus Slave Image 0 Control = E0F20000
Sets VSI0_CTL to indicate that this image is enabled, write and read posting is enabled,
program/data and supervisory AM coding, data width is 32 bits, VMEbus A32 address
space, 64-bit PCI transfers are disabled, PCI Lock on RMW cycles are disabled, and to
transfer into PCI memory space.
 VMEbus Slave Image 0 Base Address Register = 00000000
Sets VSI0_BS to define the lower bound of VME addresses to be transferred to the local PCI
bus is 0x00000000.
 VMEbus Slave Image 0 Bound Address Register = (Local DRAM Size)
Sets VSI0_BD to define that the upper bound of VME addresses to be equal to the size of
local DRAM.