Appendix a: watchdog timer, Watchdog timer control register – NEXCOM NDiS M324 User Manual

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NDiS M324 User Manual

Appendix A: Watchdog Timer

Appendix A: Watchdog Timer

NDiS M324 features a watchdog timer that resets the CPU or generates an interrupt if

the processor stops operating for any reason. This feature ensures system reliability in

industrial standalone or unmanned environments.

Watchdog Timer Control Register

WDT_CONTROL BYTE

0x68

// 0x68

Bit 7: WDT enable

0: Disable WDT, 1: Enable WDT

Bit 1: WDT output

0: WDT via EC reset, 1: WDT via KBRST

Bit 0: WDT timeout value unit

0: Second, 1: Minute

Default: 0x00

WDT_TIMEOUT BYTE

0x69

// 0x69

Second: 3~255 sec
Minute: 1~255 min
Default: 3