ADLINK PCI-9527 - Manual (Page 49)

Operation Theory 37
ADLINK Technology Inc. PCI-9527
Copyright 2010 User’s Manual
3.5.4 Filter Delay in ADC and DAC
The filter delay indicates the time required fro data to propagate
through a converter. Both AI and AO channels have filter delay
due to the filter circuitry and the architecture of the converter. Fol-
lowing tables show the filter delay in ADC and DAC.
ADC Filter Delay
DAC Filter Delay
Update Rate (kS/s) Filter Delay (Samples)
2K - 54KSps 12
54K-108KSps 7
108K-216KSps 5
216K-432KSps 5
Table 3-8: ADC Filter Delay
Update Rate (kS/s) Filter Delay (Samples)
2K - 54KSps 43.4
54K-108KSps 87.5
108K-216KSps 176.8
Table 3-9: DAC Filter Delay