ADLINK DAQe-2214 - Manual (Page 69)

Operation Theory 57
4.3 Digital I/O
The DAQ-/DAQe-2213/2214 card contains 24 lines of general-pur-
pose digital I/O (GPIO) which is provided through the 82C55A
chip.
The 24-line GPIO are separated into three ports: Port A, Port B
and Port C. High nibble (bit[7…4]), and low nibble (bit[3…0]) of
each port can be programmed individually to be either inputs or
outputs. Upon system startup or reset, all the GPIO pins are reset
to high impedance inputs.
4.4 General Purpose Timer/Counter Operation
NOTE The DAQ-/DAQe-/PXI-2208 card does not support this
function.
Two independent 16-bit up/down timer/counter are designed
within FPGA for various applications. They have the following fea-
tures:
X
Count up/down controlled by hardware or software
X
Programmable counter clock source (internal or external
clock up to 10 MHz)
X Programmable gate selection (hardware or software con-
trol)
X
Programmable input and output signal polarities (high active
or low active)
X
Initial count can be loaded from software
X
Current count value can be read-back by software without
affecting circuit operation