Fpga configuration – Connect Tech PCI-104 User Manual
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Connect Tech FreeForm/PCI-104 User Manual
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FPGA Configuration
The Virtex-5 FPGA can be configured via two methods:
o
o
SPI Flash, read on, power-up by FPGA
The configuration flash can be programmed (loaded) through three methods:
o
JTAG programming chain (through FPGA), using
o
o
Indirect programming through FPGA, only possible after configuration is complete (refer
to reference design for more details)
To configure the FPGA via the JTAG / boundary scan programming chain, three items are required:
o
FPGA bitstream (*.bit), generated at end FPGA implementation using ISE
o
PLX 9056 boundary scan definition file (*.bdsl)
o
Ethernet PHY boundary scan definition file
To program the SPI flash, a hex file must be generated (*.mcs) then written to the flash. To generate
the hex file, the following is required:
o
FPGA Bitstream
o
Setting PROM file format to MCS (important since bits are swapped)
o
Setting SPI PROM density to 16M
o
Setting SPI Flash type to M25P16