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Fpga configuration – Connect Tech PCI-104 User Manual

Page 19

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Connect Tech FreeForm/PCI-104 User Manual

Revision 0.02

19

FPGA Configuration

The Virtex-5 FPGA can be configured via two methods:

o

JTAG programming chain, using

P2

o

SPI Flash, read on, power-up by FPGA

The configuration flash can be programmed (loaded) through three methods:

o

JTAG programming chain (through FPGA), using

P2

o

Direct with cable, using

P3

o

Indirect programming through FPGA, only possible after configuration is complete (refer
to reference design for more details)

To configure the FPGA via the JTAG / boundary scan programming chain, three items are required:

o

FPGA bitstream (*.bit), generated at end FPGA implementation using ISE

o

PLX 9056 boundary scan definition file (*.bdsl)

o

Ethernet PHY boundary scan definition file

To program the SPI flash, a hex file must be generated (*.mcs) then written to the flash. To generate
the hex file, the following is required:

o

FPGA Bitstream

o

Setting PROM file format to MCS (important since bits are swapped)

o

Setting SPI PROM density to 16M

o

Setting SPI Flash type to M25P16

For a complete procedure, refer to

Appendix A

.