Maxim Integrated MAXREFDES71 ZedBoard - Manual (Page 8)

MAXREFDES71# ZedBoard Quick Start Guide
8
4. Download Demonstration from Xilinx SDK
Below is a high-level overview of the steps required to quickly get the MAXREFDES71#
design running by downloading and running the FPGA project. Detailed instructions for
each step are provided in the following pages.
1) Connect the MAXREFDES71# board to the J1 FMC connector of a ZedBoard as
shown in Figure 5 .
2) Download the latest RD71V01_00.ZIP file located at the MAXREFDES71# page.
3) Extract the RD71V01_00.ZIP file to a directory on your PC.
4) Open the Xilinx SDK.
5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA
hardware design and software bootloader.
6) Use Xilinx SDK to download and run the executable file (.ELF) on one of the two
ARM
®
Cortex
TM
-A9 processors.