Kontron CP372 - Manual (Page 7)

CP372 Preface
ID 25780, Rev. 01 © 2002 Kontron Modular Computers GmbH Page vii
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P R E L I M I N A R Y
List of Tables
1-1 CP372 Product Overview ......................................................................... 1 - 4
1-2 System Relevant Information ................................................................... 1 - 6
1-3 CP372 Main Specifications ...................................................................... 1 - 9
1-4 CP372 Analog Output Specifications ..................................................... 1 - 10
1-5 CP372 Accuracy .................................................................................... 1 - 11
1-6 Applied Standards .................................................................................. 1 - 12
1-7 Related Publications .............................................................................. 1 - 12
2-1 Pinout of the Analog Output Interface Connector CON2 ......................... 2 - 7
2-2 CPCI Connector CON1 (J1) ..................................................................... 2 - 9
2-3 JTAG Connector (CON3) Pinout ............................................................ 2 - 10
4-1 I/O Address Map of CP372 ...................................................................... 4 - 9
4-2 DAC Common Control Register Bit Map ............................................... 4 - 11
4-3 RNG, BIP Bits ......................................................................................... 4 - 11
4-4 DAC Data Registers Bit Map ................................................................ 4 - 11
4-5 ROM Command Register Bit Map ......................................................... 4 - 12
4-6 ROM Control Register Bit Map .............................................................. 4 - 12
4-7 Opcodes and Commands ...................................................................... 4 - 12
4-8 ROM Status Register Bit Map ................................................................ 4 - 12
4-9 ROM Data Register Bit Map .................................................................. 4 - 13
4-10 Hardware Debug Register Bit Map ........................................................ 4 - 13
4-11 Hardware Status Register Bit Map ......................................................... 4 - 13