Cirrus Logic AN179 - Manual

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Copyright 2001 Cirrus Logic (All Rights Reserved) SEP ’01
AN179REV2
1
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
AN179
Application Note
Interfacing a Color LCD Module to the EP72xx and EP73xx
Introduction
As the world of PDAs and other hand-held devices evolves, more and more of these products need the support of
color displays. Today, the use of color displays constitutes only a small market share. However, the desire for color
support is growing dramatically. This application note is created to support this trend.
This application note describes how the LCD Controller integrated into the Cirrus Logic EP72xx embedded
processor can be used to drive a color LCD module. This application note will first describe in detail how the
EP72xx’s LCD Controller can be used to support color displays. Next, it will provide an example of an application
using a Sharp LM057QCTT03 ¼ VGA Color LCD module. Finally, it will provide a list of other color LCD modules
that are known to be compatible with LCD Controller in the EP72xx.
EP72xx LCD Controller Description
The LCD Controller provides all the necessary control signals to interface directly to a single-panel, multiplexed
LCD module. The EP72xx uses the Universal Memory Architecture (UMA) for storing the video frame buffer. It
shares the main memory bus with the core processor (i.e., the ARM720T). The total frame buffer size can be
programmed up to 128 kbytes. The panel size is programmable and can basically support any panel size available,
including the support for full VGA sizes. Any width (line length) from 32 to 1024 in 16-pixel increments can be
programmed. The total number of lines (rows) supported is solely determined by the total frame buffer size
programmed, divided by the panel width and color depth programmed.
The controller can also be programmed to provide 1-, 2-, or 4-bits-per-pixel color depth. The use of these bits is up
to the application. They can be used to support a monochrome, gray-scale, or color display.
As an example: If a 1/2 VGA display is used, and 4 bpp is desired, the Video Buffer Size field in the LCD Control
register (LCDCON) will have to be programmed to equal 640 x 240 x 4 = 614,400 bits = 76,800 bytes. The Line
Length field in the register will have to be programmed to equal 640, and the color depth field will have to be
programmed to equal 4. These three settings will result in the support for the 240 lines.
To support the various possible colors and gray-scale levels, the LCD Controller has two 32-bit palette registers.
These palette registers are broken down into eight addressable nibbles each. This makes a total of sixteen nibbles.
The nibbles are addressed by the data in the frame buffer. When the LCD Controller is configured to support
4 bpp, each four bits of data in the frame buffer is used to represent one pixel. Each of these nibbles addresses one
of the sixteen nibbles in the two palette registers.
For example, if a nibble in the frame buffer contained the decimal value of ten, it would point to the tenth nibble in
the two palette registers. This addressing scheme is used to map the data value in the frame buffer to the actual
gray-scale level that will be supplied to the display interface. When 4 bpp mode is configured, all sixteen nibbles in
the palettes registers are used for the mapping. This of course, is due to the fact that four bits can provide sixteen
different values. When 2 bpp mode is configured, only the lowest addressable four nibbles are used. When in
1 bpp mode, only the lowest two nibbles are used.
Each palette register nibble can be programmed with a value from 0 to 15. These sixteen different values
correspond to 16 different color depth levels. When the value programmed into each nibble matches its nibble