Cirrus Logic CDB61880 User Manual
Page 2
CDB61880
2
DS450DB1
TABLE OF CONTENTS
1. CDB61880 EVALUATION BOARD LAYOUT .......................................................................... 4
2. BOARD COMPONENT DESCRIPTIONS ................................................................................. 5
2.1 Power Connections ............................................................................................................ 5
2.2 Master Clock Selection ...................................................................................................... 5
2.3 Operating Mode Selection ................................................................................................. 6
2.4 Line Interface Connections ................................................................................................ 6
2.5 TXOE Selection ................................................................................................................. 6
2.6 Clock Edge Selection ......................................................................................................... 7
2.7 Jitter Attenuator Selection .................................................................................................. 7
2.8 Loopback Mode Selection .................................................................................................. 7
2.9 Line Length/Impedance Selection ...................................................................................... 8
2.10 Coder/Motorola/Intel Selection ......................................................................................... 8
2.11 G.772 Monitoring Address Selection ............................................................................... 8
2.12 Mux/Non-Mux/BITS Clock Selection ................................................................................ 8
2.13 Digital Signal Connections ............................................................................................... 9
2.14 LOS Indicators ................................................................................................................. 9
2.15 JTAG Connection ............................................................................................................. 9
2.16 Host Interface Connection ............................................................................................... 9
3. HOST SETUP DESCRIPTION .................................................................................................. 9
4. HOST SOFTWARE INTERFACE ........................................................................................... 10
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