5 line and headphone outputs, 6 control port interface and gui, 7 power – Cirrus Logic CDB44800 User Manual
Page 4: 8 grounding and power supply decoupling, 9 critical component selection

CDB44800
4
DS632DB2
The CS8416 converts the input S/PDIF data stream into PCM data for the CS44800. The
CS8416 operates in master mode and can output either 128*Fs or 256*Fs from its RMCK pin.
Digital Interface format selection of I²S (24-bit), Left Justified (24-bit), or Right Justified (16 or
24-bit) can be made.
D20 (RERR) indicates a receiver error, such as loss of lock.
S/PDIF input is through OPT1 or J33.
1.5
Line and Headphone Outputs
An example of line level and headphone driver outputs are provided on the board. J18/J19
and J20 must be in place to connect the PWM outputs to drive the headphone and line out-
puts.
1.6
Control Port Interface and GUI
The CS44800 is controlled through the provided control port interface. Connections to the
control port can be made through J37 (RS-232 Serial) or J29 (External Control Header). A
Windows based GUI provides control over all the individual registers of the CS44800 and the
CS8416. To use the onboard control logic, J29 should be jumpered to “PC”. To use external
control logic J29 should have all jumpers removed and external signal and ground can be in-
put through the pins labeled “EXT”. All external control signal levels should be referenced to
the VLC voltage setting of the board.
1.7
Power
Power must be supplied to the evaluation board through the +5.0 V binding post (J41). On-
board regulators supply +3.3 V and +2.5 V to the rest of the board. All voltage inputs must be
referenced to the single black banana-type ground connector (J40).
WARNING:Please refer to the CS44800 datasheet for allowable voltage levels.
1.8
Grounding and Power Supply Decoupling
The CS44800 requires careful attention to power supply and grounding arrangements to op-
timize performance. The block diagram on page 1 provides an overview of the connections
to the CS44800, Figure 13 shows the component placement, Figure 14 shows the top layout,
and Figure 15 shows the bottom layout. The 0.1µF ceramic decoupling capacitors are locat-
ed as close to the power pins of the CS44800 as possible and on the same side of the board
as the CS44800. Extensive use of ground plane fill in the evaluation board yields large reduc-
tions in radiated noise.
1.9
Critical Component Selection
The output filter of the half-bridge and full-bridge outputs have components that must be cho-
sen carefully.
The output snubbing resistors, R17-R40, used to shape the switching PWM output edges,
should be 5.6
Ω,
¼
W (VP = 30 V), ½ W (VP = 40 V), or 1 W (VP = 50 V) resistors. This board
is populated with DALE CRCW20105R62F parts.