Cirrus Logic CDB4365 - Manual (Page 17)

DS67
0DB3
17
CDB4365
9. CDB4365 SCHEMATICS
CS4365
CS8416
S/PDIF
Input
Serial Control Port
PCM mux
PCM Clocks/Data
PCM Clocks/Data
I 2 C/SPI Header
Power
D
S
D Clo
cks
/
Da
t
a
DSD HEADER
2
2
DSD clk_enable
PCM Clocks/Data
D
S
D
i
nput
enabl
e
M
0
- M
4
sw
it
c
h
e
s
(
fo
r
s
tand
-
alone mode
)
PC
M s
ourc
e
se
le
c
t
C S
841
6
c
lo
ck se
tt
in
g
Hardware Control
Switches
PCM HEADER
2
A1, B1
A2, B2
A3, B3
Differential to Single-Ended
Analog Outputs
Figure 52 on page 26
Figure 45 on page 19
Figure 46 on page 20
Figure 47 on page 21
Figure 51 on page 25 Figure 50 on page 24
Figure 49 on
page 23
Figure 48 on
page 22
Figure 49 on
page 23
Figure 51 on page 25
Figure 43. System Block Diagram and SIgnal Flow