beautypg.com

Schematics and layout, Figure 31. system block diagram and signal flow, Figure 31 – Cirrus Logic CDB4353 User Manual

Page 12: Cs4353, Figure 33

background image

12

DS80

3DB2

CDB4353

12.SCHEMATICS AND LAYOUT

Indicator LEDs

S/PDIF Error
S/PDIF or PCM Input Selected
+3.3V power
VL power

CS4353

CS8416

S/PDIF

Receiver

PCM Mux
and Level

Shifter

PCM Clocks/Data

PCM Clocks/Data

CS4353 Settings

PCM

so
urc

e

se
le

ct

CS8416 serial port

format

Analog Outputs

Hardware Control

Switches

Reset Circuit

C

S

4353

Rese

t

CS8416 Reset

External

System

Connector

PCM Clocks/Data

PCM Clocks/Data

PCM Input

Optical

S/PDIF

Input

AOUTA

AOUTB

PCM HEADER

Coaxial

S/PDIF

Input

+3.3V Power

(Optional separate VL)

Figure 31. System Block Diagram and Signal Flow

Figure 33

Figure 33

Figure 32

Figure 33

Figure 32

Figure 33

Figure 33

Figure 32

Figure 32

Figure 32