Cirrus Logic CDB4351 - Manual (Page 3)

CDB4351
DS566DB3 3
CDB4351 SYSTEM OVERVIEW
The CDB4351 evaluation board is an excellent means of quickly evaluating the CS4351. The
CS8416 digital audio interface receiver provides an easy interface to digital audio signal sources
including the majority of digital audio test equipment. The evaluation board also allows the user
to supply external PCM clocks and data through a header for system development.
The CDB4351 schematic has been partitioned into 6 schematics shown in Figures 2 through 7.
Each partitioned schematic is represented in the system diagram shown in Figure 1. Notice that
the system diagram also includes the interconnections between the partitioned schematics.
1. CS4351 DIGITAL-to-ANALOG CONVERTER
A description of the CS4351 is included in the CS4351 datasheet.
2. CS8416 DIGITAL AUDIO RECEIVER
The system receives and decodes the standard S/PDIF data format using a CS8416 Digital Au-
dio Receiver, Figure 5. The outputs of the CS8416 include a serial bit clock, serial data, left-right
clock, and a 128/256 Fs master clock. The CS8416 data format is selected by switch S1. The
operation of the CS8416 and a discussion of the digital audio interface is included in the CS8416
datasheet.
The evaluation board has been designed such that the input can be either optical or coaxial, see
Figure 5. However, both inputs cannot be driven simultaneously.
Positions 1 and 2 of S1 set the serial format for the CS8416. These should match the settings of
the CS4351 (default is both set to I
2
S). Position 3 of S1 sets the output MCLK to LRCK ratio of
the CS8416. This switch should be set to 256 (LO) for input Fs<=48 kHz and can be either 256
(LO) or 128 (HI) for Fs>48 kHz
3. INPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to external systems via the header
J9. Header J9 allows the evaluation board to accept externally generated PCM clocks and data.
The schematic for the clock/data input is shown in Figure 4. Switch position 4 of S1 selects the
source as either CS8416 or header J9.
Please see the CS4351 datasheet for more information.
4. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by six binding posts (GND, +5 V, VL, VD, VA, and
VA_H), see Figure 7. The VD, VL, and VA supplies can be jumpered to a +3.3 V regulator and
the +5 V binding post can be jumpered to a 5 V regulator thus requiring only VA_H and GND for
ease of use. VD, VL, VA and VA_H should be set to the recommended values stated in the
CS4351 datasheet.
WARNING: Refer to the CS4351 datasheet for maximum allowable voltages levels. Operation
outside of this range can cause permanent damage to the device.