Cirrus Logic AN263 - Manual (Page 7)

AN263
AN263REV1 7
3.1.1 Illustrative Noise Budget Calculation
Let's calculate the required buffer noise for the CS5381 to meet the assumption of negligible noise con-
tribution using the “rule-of-thumb” design goal. The equivalent noise of the CS5381 can be calculated as
previously shown using the relevant data sheet specifications, where the un-weighted Dynamic Range is
117 dB and the full-scale differential input is 2 Vrms. This calculation shows that the equivalent noise for
the CS5381 is 2.83
µV. Based on the “rule-of-thumb” noise requirement, the buffer noise should be 20 dB
below the equivalent converter noise, or 0.283
µV.
It is informative and enlightning to compare this noise voltage to the equivalent noise generated by a re-
sistor at room temperature (25 degrees C). The following is the equation used to calculate the noise for
a resistor.
Where:
- k = 1.38 x 10-23 Joules / degree (Boltzman's Constant)
- T = Absolute temperature of the resistor
- B = effective bandwidth (20 kHz for this example)
- R = resistance value
Solving this equation for the resistance and inserting the buffer noise voltage design goal indicates that
the noise contribution of the buffer must be equal to or less than the equivalent noise of a 243 ohm resis-
tor! It's apparent that in the case of high-dynamic range converters, the noise contribution of the input and
output buffers cannot be assumed to be negligible. Low noise design techniques for the analog buffers
must be employed to achieve the full performance capabilities of leading edge converters.
3.2 Combined Converter and Buffer Dynamic Range from a different perspective
It is interesting to look at this relationship from the perspective of the deviation from ideal as the converter
dynamic range increases and the buffer noise remains constant. This has been a relatively common oc-
currence over the past few years as systems designers have been assigned the goal of updating an ex-
isting product by increasing the system dynamic range. The obvious solution is to replace the existing
converters with higher dynamic range converters. Unfortunately, the assumption is often made that the
noise contribution of the existing buffer design is negligible, which often leads to disappointing results and
subsequent redesign.
Figure 6 displays the results of this situation with a hypothetical D/A and filter design. The X-axis of the
graph indicates the converter dynamic range and the Y-axis indicates the dynamic range of the combined
filter / buffer and D/A converter. The upper plot indicates the ideal dynamic range where the buffer noise
is zero. The remaining plots indicate the degradation in performance with a fixed buffer noise contribution
for four different converter full-scale output voltages. Notice that, for this example, the deviation from ideal
for the converters with dynamic ranges in the 100 to 105 dB range is minimal. However, as converter per-
formance exceeds 105 dB the deviation becomes significant.
V
n
resistor
4kTBR =