Asus MAXIMUS V E7295 - Manual (Page 103)

ASUS MAXIMUS V FORMULA Series 3-11
Chapter 3
tWW (DD) [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [8 DRAM Clock]
tWW (DR) [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [8 DRAM Clock]
tWWSR [Auto]
Configuration options: [Auto] [4 DRAM Clock] – [7 DRAM Clock]
MISC
MRC Fast Boot [Enabled]
Configuration options: [Enabled] [Disabled]
DRAM CLK Period [Auto]
Configuration options: [Auto] [1] – [14]
Transmitter Slew (CHA) [Auto]
Configuration options: [Auto] [1] – [7]
Transmitter Slew (CHB) [Auto]
Configuration options: [Auto] [1] – [7]
Receiver Slew (CHA) [Auto]
Configuration options: [Auto] [1] – [7]
Receiver Slew (CHB) [Auto]
Configuration options: [Auto] [1] – [7]
MCH Duty Sense (CHA) [Auto]
Configuration options: [Auto] [1] – [31]
MCH Duty Sense (CHB) [Auto]
Configuration options: [Auto] [1] – [31]
Channel A DIMM Control [Enable Both DIMMS]
Configuration options: [Enable Both DIMMS] [Disable DIMM0] [Disable
DIMM1] [Disable Both DIMMS]
Channel B DIMM Control [Enable Both DIMMS]
Configuration options: [Enable Both DIMMS] [Disable DIMM0] [Disable
DIMM1] [Disable Both DIMMS]
DRAM Read Additional Swizzle [Auto]
Configuration options: [Auto] [Enabled] [Disabled]
DRAM Write Additional Swizzle [Auto]
Configuration options: [Auto] [Enabled] [Disabled]