Ampro Corporation XTX 820 - Manual (Page 71)

Chapter 4 BIOS Setup Utility
XTX 820 Reference Manual 65
♦ GPE2 Function – [No Function] or [Sleep Button]
This field determines the function of the GPE2 pin on J4 (X4), pin-89 connector of the XTX 820.
>PCI Configuration
• Plug & Play O/S – [No] or [Yes]
∗ If [No] is selected, the BIOS is allowed to configure all the devices in the system.
∗ If [Yes] is selected, the Operating System (OS) is allowed to change the interrupt, I/O, and
DMA settings for the devices in the system. This is only used by Plug & Play capable OSs.
• PCI Latency Timer – [32], [64], [96], [128], [160], [192], [224], or [248]
This feature sets the latency of all PCI devices on the PCI bus. The various settings allow the
PCI Latency timer to be adjusted to the number of clock cycles specified. The default setting
[64] adjust the PCI Latency timer to 64 PCI clock cycles.
• Allocate IRQ to PCI VGA – [Yes] or [No]
This field allows or restricts the system from giving the VGA adapter card an interrupt address.
∗ If [Yes] is selected, the BIOS is allowed to allocate an IRQ to any VGA adapter card that uses
the PCI local bus.
>PCI IRQ Resource Exclusion
♦ IRQ3 – [Available] or [Reserved]
♦ IRQ4 – [Available] or [Reserved]
♦ IRQ5 – [Available] or [Reserved]
♦ IRQ6 – [Available] or [Reserved]
♦ IRQ7 – [Available] or [Reserved]
♦ IRQ9 – [Available] or [Reserved]
♦ IRQ10 – [Available] or [Reserved]
♦ IRQ11 – [Available] or [Reserved]
♦ IRQ12 – [Available] or [Reserved]
♦ IRQ14 – [Available] or [Reserved]
♦ IRQ15 – [Available] or [Reserved]
>PCI Interrupt Routing
♦ PIRQ A (VGA, Azalia, PCIEX1) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
♦ PIRQ B (AC97, PCIEX2) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
♦ PIRQ C (PATA, UHCI2, PCIEX3) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
♦ PIRQ D (SATA, UHCI1, SMB, PCIEX4) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14],
or [15]
♦ PIRQ E (INTA, Onboard LAN) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
♦ PIRQ F (INTB) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
♦ PIRQ G (INTC) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
♦ PIRQ H (INTD, UHCI0, EHCI) – [Auto]. [3], [4], [5], [7], [9], [10], [11], [12], [14], or [15]
Definition of Terms
PCIEXn : PCI Express Root Port n
INTn : External PCI Bus INTn Line