Asus TX97 - Manual (Page 42)

ASUS TX97 User’s Manual 42
IV. BIOS SOFTWARE
IV
. BIOS
(Chipset Features)
Chipset Features Setup
This “Chipset Features Setup” option controls the configuration of the board’s chipset.
Control keys for this screen are the same as in the BIOS Features Setup screen.
NOTE: SETUP Defaults are noted in parenthesis next to each function heading.
Details of Chipset Features Setup
Auto Configuration (60ns DRAM)
The default setting of 60ns DRAM sets the optimal timings for items 2 through 9 for
60ns DRAM modules. If you are using 70ns DRAM modules, you must change this
item to 70ns DRAM. See section III for DRAM installation information.
SDRAM CAS# Latency (3T)
If you use ASUS SDRAM DIMM modules, you can set this to 2T for better perfor-
mance, otherwise leave on default or check with your vendor for DIMM specs.
SDRAM Speculative Read (Disabled)
If Enabled, the CPU will issue predict commands to access the DRAM, if a miss
occurs, the CPU will cancel this command. Some operating systems under certain
situations have a problem utilizing this feature so it is normally Disabled.
Passive Release (Enabled)
This is a mechanism that allows concurrency of ISA/EISA cycles and CPU-to-PCI
cycles. When this feature is enabled, the TXC will be possible to re-arbitrate PCI
bus and allow the CPU to access PCI even when the PCEB has been granted the bus.
Delayed Transaction (Disabled)
If Enabled, this frees the PCI Bus during CPU accessing of 8-bit ISA cards which
normally consume about 50-60 PCI Clocks without PCI delayed transaction. If PCI
Bus Masters cannot use the PCI Bus, leave this on the default setting of Disabled for
some ISA cards that are not PCI 2.1 compliant.
16-bit I/O Recovery Time (1 BUSCLK)
Timing for 16-bit ISA cards.