Rainbow Electronics MAX847 - Manual (Page 14)

MAX847
Serial data is clocked in and out MSB first. Input data is
latched on the CLK rising edge, and output data is
shifted out on the CLK falling edge. When CS goes low,
DO immediately contains the MSB output bit (D7). D6 is
not clocked out until the falling clock edge that follows
the first rising clock edge after a Chip Select. See the
timing diagrams in Figures 5 and 6. SPI writes and reads concurrently, so it may be neces-
sary to perform dummy writes in order to read output
data. Four output data bits (D7–D4, Table 5) are sent
from SDO each time a serial operation occurs.
When R2 = 0, R0 and R1 are address pointers.
However, when R2 = 1, the 7 remaining bits (R1, R0
and D4–D0) become DAC programming bits. This vio-
1-Cell, Step-Up
Two-Way Pager System IC
14 ______________________________________________________________________________________
CS
SCL
SDO D7 D6
R1 R2 D4 R0 D2 D3 D0 D1
D5 D4 0 0 0 0
SDI
Figure 6. CS, SCL, SDO, and SDI Serial Timing
• • •
• • •
• • •
• • •
CS
SCLK
DIN
DOUT
t CSH
t CSS
t CL
t DS
t
DH
t DV
t CH
t DO t TR
t CSH
Figure 5. Detailed Serial-Interface Timing