Rainbow Electronics MAX1126 - Manual (Page 5)

MAX1126
Quad, 12-Bit, 40Msps, 1.8V ADC with
Serial LVDS Outputs
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(AV DD = 1.8V, OV DD = 1.8V, CV DD = 1.8V, GND = 0, external V REFIO = 1.24V, INTREF = AV DD , C REFIO to GND = 0.1µF,
f CLK = 40MHz (50% duty cycle), DT = 0, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PDALL = 0, all channels
active
246 285
PDALL = 0, all channels
active, DT = 1
246
PDALL = 0, 1 channel active 76
PDALL = 0, PD[3:0] = 1111 20
mA
AV DD Supply Current I AVDD
f IN =
19.3MHz at
-0.5dBFS
PDALL = 1, global power
down, PD[3:0] =1111, no
clock input
438 µA
PDALL = 0, all channels
active
51 57
PDALL = 0, all channels
active, DT = 1
63
PDALL = 0, 1 channel active 35
PDALL = 0, PD[3:0] = 1111 30
mA
OV DD Supply Current I OVDD
f IN =
19.3MHz at
-0.5dBFS
PDALL = 1, global power-
down, PD[3:0] =1111, no
clock input
375 µA
CV DD Supply Current I CVDD
CV DD is used only to bias ESD-protection
diodes on CLK input, Figure 2
0 mA
Power Dissipation P DISS f IN = 19.3MHz at -0.5dBFS 535 616 mW
TIMING CHARACTERISTICS (Note 6)
Data Valid to CLKOUT Rise/Fall t
OD
f
CLK
= 40MHz, Figure 5 (Notes 6 and 7)
(t SAMPLE /
24)
- 0.15
t SAMPLE /
24
(t SAMPLE /
24)
+ 0.15
ns
CLKOUT Output Width High t CH Figure 5
t S AMP LE /
12
ns
CLKOUT Output Width Low t CL Figure 5
t S AMP LE /
12
ns
FRAME Rise to CLKOUT Rise t CF Figure 4 (Note 7)
(t SAMPLE /
24)
- 0.15
t SAMPLE /
24
( t SAMPLE /
24)
+ 0.15
ns