Max3622, Interfacing with lvpecl outputs, Interface models – Rainbow Electronics MAX3622 User Manual
Page 7
Interfacing with LVPECL Outputs
The equivalent LVPECL output circuit is given in Figure
7. This output is designed to drive a pair of 50
Ω trans-
mission lines terminated with 50
Ω to V
TT
= V
CC
- 2V. If
a separate termination voltage (V
TT
) is not available,
other termination methods can be used such as shown
in Figures 5 and 6. Unused outputs should be disabled
and may be left open. For more information on LVPECL
terminations and how to interface with other logic fami-
lies, refer to Maxim Application Note
HFAN-01.0:
Introduction to LVDS, PECL, and CML
.
Interface Models
Figure 7 and Figure 8 show examples of interface models.
MAX3622
X_IN
X_OUT
27pF
25MHz
CRYSTAL
(C
L
= 18pF)
33pF
Figure 4. Crystal, Capacitors Connection
Low-Jitter, Precision Clock Generator
with Two Outputs
_______________________________________________________________________________________
7
MAX3622
QB
82
Ω
Z
0
= 50
Ω
QB
Z
0
= 50
Ω
82
Ω
130
Ω
130
Ω
+3.3V
HIGH
IMPEDANCE
Figure 5. Thevenin Equivalent of Standard PECL Termination
MAX3622
QB
150
Ω
100
Ω
QB
Z
0
= 50
Ω
Z
0
= 50
Ω
HIGH
IMPEDANCE
150
Ω
0.1
μF
NOTE: AC-COUPLING IS OPTIONAL.
0.1
μF
Figure 6. AC-Coupled PECL Termination
ESD
STRUCTURES
QB
V
CC
QB
Figure 7. Simplified LVPECL Output Circuit Schematic
10
Ω
10
Ω
ESD
STRUCTURES
QA_C
GNDO_A
IN
DISABLE
V
DDO_A
Figure 8. Simplified LVCMOS Output Circuit Schematic