Rainbow Electronics MAX1543 - Manual (Page 18)

MAX1542/MAX1543
TFT LCD DC-to-DC Converter with
Operational Amplifiers
18 ______________________________________________________________________________________
Power Dissipation
The MAX1542/MAX1543s’ maximum power dissipation
depends on the thermal resistance from the IC die to
the ambient environment and the ambient temperature.
The thermal resistance depends on the IC package, PC
board copper area, other thermal mass, and airflow.
The MAX1542/MAX1543, with their exposed backside
pad soldered to 1in
2 of PC board copper, can dissipate
about 1.7W into +70°C still air. More PC board copper,
cooler ambient air, and more airflow increase the possi-
ble dissipation while less copper or warmer air
decreases the IC’s dissipation capability. The major
components of power dissipation are the power dissi-
pated in the step-up converter and the power dissipat-
ed by the operational amplifiers.
Step-Up Converter
The largest portions of power dissipation in the step-up
converter are the internal MOSFET, inductor, and the
output diode. If the step-up converter has 90% efficien-
cy, about 3% to 5% of the power is lost in the internal
MOSFET, about 3% to 4% in the inductor, and about
1% in the output diode. The rest of the 1% to 3% is dis-
tributed among the input and output capacitors and the
PC board traces. If the input power is about 3W, the
power lost in the internal MOSFET is about 90mW to
150mW.
Operational Amplifiers
The power dissipated in the operational amplifiers
depends on their output current, the output voltage,
and the supply voltage:
where I OUT_(SOURCE) is the output current sourced by
the operational amplifier, and I OUT_(SINK) is the output
current that the operational amplifier sinks.
In a typical case where the supply voltage is 8V and
the output voltage is 4V with an output source current
of 30mA, the power dissipated is 120mW.
Layout Procedure
Careful PC board layout and routing are required for
high-frequency switching power supplies to achieve
good regulation, high efficiency, and stability. Use the
following guidelines for good PC board layout:
1) Place the input capacitors close enough to the IC to
provide adequate bypassing (within 1.5cm).
Connect the input capacitors to IN with a wide trace.
Minimize the area of high-current loops by placing
the inductor, output diode, and output capacitors
near the input capacitors and near LX and PGND.
The high-current input loop goes from the positive
terminal of the input capacitor to the inductor, to the
IC’s LX pin, out PGND, and to the input capacitor
negative terminal. The high-current output loop is
from the positive terminal of the input capacitor to
the inductor, to the catch diode (D1), to the positive
terminal of the output capacitors, reconnecting
between the output capacitor and input capacitor
ground terminals. Connect these loop components
together with short, wide connections. Avoid using
vias in the high-current paths. If vias are unavoid-
able, use many vias in parallel to reduce resistance
and inductance.
2) Create a power ground island (PGND) consisting of
the input and output capacitor grounds, PGND pin,
and the SRC bypass capacitor and other charge-
pump components. Connect all of these together
with short, wide traces or a small ground plane.
Maximizing the width of the power ground traces
improves efficiency and reduces output voltage rip-
ple and noise spikes.
Create an analog ground island (AGND) consisting
of the AGND pin, FB divider, the operation amplifier
dividers, the COMP and DEL capacitor ground con-
nections, and the device’s exposed backside pad.
Connect the AGND and PGND islands by connect-
ing the PGND pin directly to the exposed backside
pad. Make no other connections between these
separate ground planes.
3) Place the feedback voltage-divider resistors close to
FB. The divider’s center trace should be kept short.
Placing the resistors far away causes their FB traces
to become antennas that can pick up switching
noise. Avoid running the feedback trace near LX or
the switching nodes in the charge pumps.
4) Minimize the length and maximize the width of the
traces between the output capacitors and the load
for best transient response.
5) Minimize the size of the LX node while keeping it
wide and short. Keep the LX node away from the
feedback node (FB) and analog ground. Use DC
traces as shields if necessary.
Refer to the MAX1543 Evaluation Kit for an example of
proper board layout.
PD I V V
PD I V
SOURCE OUT SOURCE SUP OUT
SINK OUT SINK OUT
= Ч −
= Ч
_( ) _
_( ) _
( )