Rainbow Electronics DS2502 - Manual (Page 14)

DS2502
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A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At regular speed the 1-Wire bus
has a maximum data rate of 16.3 kbits per second. If the bus master is also required to perform
programming of the EPROM portions of the DS2502, a programming supply capable of delivering up to
10 milliamps at 12 volts for 480 µs is required. The idle state for the 1-Wire bus is high. If, for any
reason, a transaction needs to be suspended, the bus MUST be left in the idle state if the transaction is to
resume. If this does not occur and the bus is left low for more than 120 µs, one or more of the devices on
the bus may be reset.
Transaction Sequence
The sequence for accessing the DS2502 via the 1-Wire port is as follows:
§ Initialization
§ ROM Function Command
§ Memory Function Command
§ Read/Write Memory/Status
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the
slave(s).
The presence pulse lets the bus master know that the DS2502 is on the bus and is ready to operate. For
more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the six ROM function commands. All
ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in Figure
9):
Read ROM [33H]
This command allows the bus master to read the DS2502’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command can be used only if there is a single DS2502 on the bus. If more
than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same
time (open drain will produce a wired-AND result).
Match ROM [55H]
The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a
specific DS2502 on a multidrop bus. Only the DS2502 that exactly matches the 64-bit ROM sequence
will respond to the subsequent memory function command. All slaves that do not match the 64-bit ROM
sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the
bus.